STA Signoff Automation Engineer for ASICs

Synopsys, based in Santiago, Chile, is looking for an ASIC Digital Signoff Engineer to validate signoff tools and improve automation processes. You will collaborate with R&D and Sales to elevate tool quality, ensuring robust releases and maximizing customer satisfaction.

The ideal candidate should have a strong background in Static Timing Analysis, Power Analysis, and physical verification with at least 2 years of experience or an advanced degree. There are various health and wellness benefits along with a flexible work schedule.