SOC Verification Engineer: Verilog/UVM, PPA Focus

BITMAIN located in Singapore is searching for a skilled engineer for module and system verification of SOC digital circuits. The ideal candidate will write verification specifications and set up the necessary verification environments while debugging simulations to enhance verification coverage.

Experience in digital circuit development, particularly involving algorithm-based methods and PPA optimization, is essential. Proficiency with Verilog/SystemVerilog and various scripting languages is required. Familiarity with EDA tools is a crucial part of this role.