SoC Verification Engineer (SystemVerilog/UVM)

This role is for one of the Weekday's clients

Min Experience: 4+ years

Location: Bengaluru

JobType: full-time

We are looking for a SoC Verification Engineer with strong expertise in SystemVerilog and UVM to contribute to the functional verification of complex ARM-based System-on-Chip (SoC) designs. In this role, you will develop verification environments, create test scenarios, execute gate-level simulations, and drive verification closure to ensure high-quality silicon.

The ideal candidate should have hands-on experience in SoC verification methodologies, UVM-based testbench development, and debugging complex simulation issues.

Requirements

Key Responsibilities

SoC Functional Verification

• Develop and execute test cases for SoC-level functional verification.
• Design and enhance SystemVerilog/UVM-based verification enviro...