Senior Yield & Defect Reduction Engineer

Vanguard International Semiconductor Singapore Pte. Ltd. is seeking an experienced individual to supervise YE Associate Engineers and lead defect reduction and yield enhancement efforts in the semiconductor industry. The ideal candidate will have a strong background in Electrical and Electronic Engineering and relevant fab experience.

The role demands expertise in defect analysis and the ability to ensure wafer quality. Excellent interpersonal skills and leadership capabilities are essential. Responsibilities further include operating failure analysis tools and managing inline defect performance.