Senior USB IP Verification Engineer — Hybrid, Impactful

Intel in Malaysia, Penang, hires an IP Design Verification Engineer to verify USB IP designs through SystemVerilog/UVM, developing test benches and coverage points. You will work with RTL and architectural teams in a hybrid work model, shaping silicon verification strategies for premium products.

The role requires 6–8 years in RTL verification, strong scripting, and hands-on experience with pre-silicon tools.