Found Description
Job Description
The Timing and Communication Group (TCG) is seeking a highly seasoned Senior Technical Staff Engineer – Analog Design to provide technical leadership and architectural direction across the development of advanced analog and mixed‑signal IPs for next‑generation timing solutions. This position goes beyond block‑level design — it requires a strategic thinker with deep analog expertise, the ability to define system‑level approaches, and a track record of mentoring and guiding high‑performance design teams.
Key Leadership & Technical Responsibilities
- Architectural Ownership: Define architecture, specifications, and design methodologies for high‑performance analog IPs including PLLs, DLLs, ADCs, DACs, high‑speed I/O interfaces, and other critical IPs used in TCG timing products.
- Drive top‑level mixed‑signal system architecture, ensuring robust integration of analog blocks within complex SoC environments.
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