Found Description
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
Responsibilities
- Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
- Perform verification and signoff activities such as formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity checks, layout verification, electrical rule checking, and structural design checks.
- Analyze results and recommend fixes for violations to improve current and future product architecture.
- Apply expertise in physical clock design, timing closure, coverage analysis, multi‑power domain analysis, placement, routing, synthesis, and DFT using industry‑standard EDA tools.
- Opti...