Senior NoC IP Architect & RTL Lead

Altera in Penang, Malaysia seeks a senior FPGA/NOC designer to lead RTL design, simulation, and verification for Network on Chip IPs and related FPGA subsystems integrated into full-chip designs.

The role involves architecture input, prototype creation, and delivering device-level models with timing and power analyses. You will mentor junior engineers, work cross-functionally, and drive excellence in RTL development.