Senior Memory Ip Design & Validation Engineer (Buenos Aires)

Join Allegro MicroSystems in Buenos Aires as a Senior IP Engineer, where you will play a critical role in the Design Enablement team.

You will design semiconductor device layouts and support the manufacturing requirements for our integral design community.

This position requires a BSEE and at least 2 years of industry experience in memory design, circuit verification, and EDA tool usage.

Be a part of an innovative team committed to making a real impact on technology.

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