Senior IC Package Design Engineer – High-Speed SerDes

Link-Worldwide is looking for an experienced Integrated Circuit Package Design Engineer based in Mexico, Sonora. The role involves designing complex flip-chip-BGA packages for high-speed SerDes and collaborating with a worldwide R&D team on cutting-edge ASICs for AI, networking, and 5G.

The ideal candidate should have over 8 years of experience in package design and knowledge of signal and power integrity. Strong project management and organizational skills, along with experience in Cadence APD, are required to succeed in this challenging position.