Senior FPGA/ASIC Integration Design Engineer

Lattice Semiconductor in Bayan Lepas, Malaysia, is seeking a highly experienced engineer with a BS or MS in Electronics/Computer/Electrical Engineering and at least 10 years of experience in Custom and Digital Design Implementation. The ideal candidate should have deep expertise in Verilog and System Verilog.

This role involves responsibilities such as transistor-level analysis, RTL coding, and project leadership through the product development cycle.