Senior Engineer, ASIC Design

Position Overview:

In this role, you will be the cornerstone of our hardware team, defining the micro-architecture and executingthe RTL implementation for our next-gen AI engines. You will tackle the industry's toughest challenges: balancing massive throughput with ultra-low latency. You will lead the design of complex datapaths, integrate RISC-Vsubsystems, and push the limits of PPA to deliver world-class silicon.

Responsibilities:

• Architectural Leadership: Translate high-level AI algorithms into robust micro-architecture specifications for high-performance compute engines.
• Core Design: Own the RTL implementation of critical modules, focusing on low-latency and high-throughput datapath optimization.
• Advanced Compute Units : Design and optimize high-efficiency ALU and specialized arithmetic units tailored for AI workloads.
• PPA Mastery: Drive th...