Found Description
Join a leading deep-tech compute architecture team as a Senior Digital Design & Verification Engineer in Zurich, focusing on RTL, UVM, and microarchitecture. Leverage your expertise across hybrid responsibilities for innovative computing solutions.
In this pivotal role, you will develop RTL for compute subsystems while contributing to microarchitecture definitions and technical reviews. The position encompasses building UVM-based verification environments, executing test plans, and collaborating closely with teams on FPGA bring-up and silicon validation tasks.
Key Responsibilities:
• Develop RTL for compute subsystems and interfaces
• Define microarchitecture and conduct technical reviews
• Build comprehensive UVM-based verification environments
• Drive functional coverage and constrain random testing
• Support FPGA bring-up and silicon validation activities
Requirements:
• Strong RTL coding skills in SystemVeri...
In this pivotal role, you will develop RTL for compute subsystems while contributing to microarchitecture definitions and technical reviews. The position encompasses building UVM-based verification environments, executing test plans, and collaborating closely with teams on FPGA bring-up and silicon validation tasks.
Key Responsibilities:
• Develop RTL for compute subsystems and interfaces
• Define microarchitecture and conduct technical reviews
• Build comprehensive UVM-based verification environments
• Drive functional coverage and constrain random testing
• Support FPGA bring-up and silicon validation activities
Requirements:
• Strong RTL coding skills in SystemVeri...
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