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Senior Dft Architect & Lead - Chip Test Strategy

Aion Silicon

barcelona, kingdom of spain, Spain Full-time June 18, 2026

Found Description

A leading technology firm based in Barcelona is seeking an experienced DFT Engineer to lead chip-level Design for Test execution.
Todas las habilidades, cualificaciones y experiencia relevantes que necesitará un candidato seleccionado se enumeran en la siguiente descripción.
The ideal candidate will drive DFT delivery from architecture definition through pattern generation and silicon bring-up, ensuring high-quality implementation and effective debug.
With 10+ years of experience and expertise in DFT tools, this role calls for strong project management skills and the ability to innovate. xhfqzwm
This position is part of a global team with flexible location options.
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