Senior Analog Layout Engineer

Perform analog circuit block, subsystem and top-level layout and verification using state-of-the art tools (Cadence Virtuoso-VXL) and techniques.

Key responsibilities

• Execute analog circuit block, subsystem and top-level layout and verification using Cadence Virtuoso-VXL and other advanced tools.
• Participate in layout design of analog circuits (block/IP/chip); plan floor‑planning from scratch; perform routing, layout verification and resolve violations.
• Contribute to layout design reviews.
• Plan block‑level schedules.

Qualifications and skills

• Bachelor's Degree in Electrical, Electronics Engineering, or Microelectronics with VLSI exposure.
• 2–5 years of job experience in analog layout; hands‑on experience from scratch, implementation of analog layout techniques, IR‑drop/EM analysis.
• Good understanding of analog circuit layout concepts in sub‑micron CMOS technologies; knowledge ...