Lead Digital RTL Design & Verification Engineer

Analog Devices is seeking a P4 Digital Design + DV Engineer to lead RTL design and drive full‑flow verification in a fast‑paced, agile environment. You will work with analog/mixed‑signal designers and may switch between design and DV roles to suit project needs.

You will define RTL architecture, implement SystemVerilog/VHDL RTL, perform lint/DFT checks, and mentor junior engineers while shaping verification strategies across multiple projects.