Lead asic rtl design engineer

Lead ASIC RTL Design Engineer
Exp-(6–12 Years)
Location: Bengaluru, India
Role Overview
We are looking for a highly skilled Lead ASIC RTL Design Engineer with strong expertise in microarchitecture definition, RTL development, and ASIC implementation. The ideal candidate will have hands-on experience in designing high-performance, power-efficient digital IPs and So Cs, translating architectural specifications into robust RTL implementations.
Key Responsibilities
Drive microarchitecture development for complex ASIC/So C blocks, balancing performance, power, area, and scalability requirements.
Develop high-quality RTL using Verilog/System Verilog for complex digital designs.
Define datapath, control logic, pipeline architecture, clocking strategies, and state machines.
Collaborate closely with architecture, verification, physical design, DFT, and firmware teams throughout the development cycle.
Create detailed design specifications, microarchitecture document...