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Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIAJob Area: Engineering Group > Hardware EngineeringGeneral SummaryThis position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip).
Main responsibilities include defining and executing the development of test methodologies and characterization of high‐speed SERDES interfaces such as PCIe, USB3, UFS, DP, MIPI (DSI, CSI), PLLs and leading‐edge LP‐DDR & PC‐DDR subsystem components (DRAM, DRAM controller, mixed‐signal PHY IP, I/O, clocking architecture, delay circuits, power distribution network) as well as other proprietary interfaces.
Responsibilities also involve developing and executing characterization plans for high‐speed interfaces to optimize design parameters and validate electrical compliance, driving first‐silicon bring‐up & debug to qualify designs fabricated at external foundries, and performing technical data analysis of parametric...
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