High Performance IC Design Expert

Memory Layout Engineer Job

We are seeking a highly skilled Memory Layout Engineer to join our team. This is an exciting opportunity to work on cutting-edge projects and be part of a great environment where work is always fun and exciting.

The ideal candidate will have 4-5 years of experience in the field and possess excellent technical skills, including lower node Finfet experience (10nm & less), memory compiler layout, SRAM, Register File (RF) design.

• Lower node Finfet experience with expertise in designs at 10nm or below.
• Proficiency in memory compiler layout, SRAM, and Register File (RF)
• Able to start within 3-4 weeks