Found Description
Responsibilities Lead systematic yield analysis across technology nodes (e.g., .18um, .11um, 55nm, etc.). Perform deep-dive failure analysis using:Parametric data (PCM/WAT)Inline defect monitoringEFA/FA correlationLayout-dependent effects (LDE) assessment Drive root cause identification for systematic and random yield detractors. Coordinate DOE definition with foundries to validate corrective actions. Monitor YOK, DPPM, bin split behavior, and excursion patterns. Establish yield baselines and learning rate targets for new product introduction (NPI). Define wafer acceptance criteria and quality gating rules for:PCM spec complianceInline defect density thresholdsReliability monitors (HTOL, EM, TDDB, BTI) Participate in excursion review boards and 8D closure reviews. Audit foundry SPC control plans and OCAP robus...
1. Yield Improvement & Yield Learning
2. Quality Gating & Process Control Governance