Digital Physical Design Engineer – PPA & Signoff Expert

BITMAIN in Singapore is seeking a seasoned Digital IC Physical Design Engineer to drive RTL-to-GDS flow, perform full-chip STA signoff, and participate in SPICE simulations for critical timing paths.

You will develop and optimize PR/PV/PI/STA design flows, support technology node advances, and contribute to PPA optimization and yield improvements.

Candidates should have strong scripting (Tcl, Python, Perl, C/C++), experience with EDA tools like Calibre, and tape-out exposure to complex IP chips.