Digital Design Engineer Prime (FEC)

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

How You Will Contribute:

At Ciena, we are at the forefront of the telecommunications industry, and our Wavelogic modem family of products plays a crucial role in our success. As a Senior Digital Design Engineer, you will be an integral part of a team responsible for implementing industry standard and custom subsystems for Ciena’s Forward Error Correction (FEC) IP. Reporting to the ASIC Senior Manager, you will collaborate with a team of Digital Design Engineers, Verification Engineers, and Architects.

Responsibilities