DFT Engineering Leader: Tests, Mentorship & Strategy

Bitdeer is seeking an experienced DFT/ASIC testing expert in Singapore to lead boundary scan, MBIST, and JTAG implementations. The role requires deep collaboration with design teams to create effective test plans and robust patterns for high-volume silicon.

Ideal candidates have 8+ years in DFT, hands-on use of Genus or Design Compiler, and experience mentoring junior engineers. The position offers growth in a fast-changing technology environment within Bitdeer.