Found Description
Position: DFT Engineer / Senior DFT Engineer / Principal DFT Engineer
Experience: 8-25 Years
Locations: Bangalore
Key Responsibilities
- End-to-end DFT implementation from RTL to final pattern sign-off.
- Scan insertion at RTL and Gate levels, including EDT and OCC implementation.
- Block-level ATPG execution, DRC analysis, and coverage closure.
- Timing and non-timing pattern simulations.
- Pattern retargeting from block level to Subsystem/SoC level.
- MBIST, IJTAG, and Boundary Scan (JTAG) integration and validation.
- Independent debug of DFT simulations and netlist-related issues.
Required Skills
- Strong experience in DFT implementation and ATPG flow.
- Hands-on experience with netlist handling and ATPG simulations.
- Expertise in pattern retargeting and simulati...
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