Found Description
This role is for one of the Weekday's clients
Salary range: Rs 3500000 - Rs 6000000 (ie INR 35-60 LPA)
Experience: 7+ yrs
Location: Bengaluru
Job Type: Full-Time
We are looking for a skilled Design Verification Engineer with strong expertise in SystemVerilog (SV) and UVM methodologies to verify complex IP and SoC designs. The ideal candidate will have hands-on experience in building robust verification environments, validating industry-standard protocols, and ensuring comprehensive functional coverage across the verification lifecycle.
In this role, you will collaborate with design and architecture teams to develop scalable verification solutions, execute simulation-based verification, and contribute to the successful delivery of high-quality semiconductor products.
Requirements