Design Verification Engineer/Lead

INVECAS

Hyderabad, Telangana, India Full-time June 10, 2026

Found Description

Experience

4-10 years

Role and responsibility:

Strong Verification experience at Subsystem or SOC level

Strong in System Verilog, Verilog, UVM, C/C++, Scripting

Strong debugging skills, problem solving skills.

Good attitude , good team player with strong interpersonal skills

Power Management, Graphics Domain experience preferred

Candidate must have low power verification experience in

intel(ODC)/AMD(ODC) projects.

Academic Qualification

BTech / Mtech Electrical/Electronics/Computers

Submit your application for Design Verification Engineer/Lead at INVECAS