Found Description
Join Synopsys as a Senior ASIC Design Verification Engineer, specializing in HBM product verification. Bring your digital design expertise to create advanced testcases and enhance product quality.
At Synopsys, you’ll utilize over 10 years of experience in digital design and verification. Your primary responsibilities will include developing verification plans and employing SystemVerilog and UVM methodologies. You will engage with design teams to resolve intricate issues and automate verification workflows using Python or Perl to optimize efficiency.
Key Responsibilities:
• Develop comprehensive verification plans for HBM products
• Write and maintain advanced testcases using SystemVerilog and UVM
• Debug complex testbench and design issues collaboratively
• Automate verification flows with Python or Perl scripting
• Review design specifications and provide constructive feedback
Requirements:
• Bachelor’s or Master’s in Electrical Engineering
• 10+ years of...
At Synopsys, you’ll utilize over 10 years of experience in digital design and verification. Your primary responsibilities will include developing verification plans and employing SystemVerilog and UVM methodologies. You will engage with design teams to resolve intricate issues and automate verification workflows using Python or Perl to optimize efficiency.
Key Responsibilities:
• Develop comprehensive verification plans for HBM products
• Write and maintain advanced testcases using SystemVerilog and UVM
• Debug complex testbench and design issues collaboratively
• Automate verification flows with Python or Perl scripting
• Review design specifications and provide constructive feedback
Requirements:
• Bachelor’s or Master’s in Electrical Engineering
• 10+ years of...
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