Found Description
Join Synopsys as an ASIC Digital Design Architect to lead innovative projects in high-performance silicon chip development. Your expertise in mixed-signal verification and automation will drive success in a collaborative environment.
This hands-on role requires over ten years of experience in ASIC development and a strong foundation in mixed-signal verification. You will implement sophisticated test plans for HPC DSP-based SERDES PHY products while working closely with stakeholders. Your skills in UVM, SystemVerilog, and various programming languages are essential for optimizing workflows and mentoring junior team members.
Key Responsibilities:
• Implement Unified Test Plans for verification and validation
• Build and maintain UVM-based verification environments
• Develop automation scripts in Python, Shell, and C++
• Collaborate with stakeholders to resolve technical challenges
• Execute comprehensive test plans for data recovery...
This hands-on role requires over ten years of experience in ASIC development and a strong foundation in mixed-signal verification. You will implement sophisticated test plans for HPC DSP-based SERDES PHY products while working closely with stakeholders. Your skills in UVM, SystemVerilog, and various programming languages are essential for optimizing workflows and mentoring junior team members.
Key Responsibilities:
• Implement Unified Test Plans for verification and validation
• Build and maintain UVM-based verification environments
• Develop automation scripts in Python, Shell, and C++
• Collaborate with stakeholders to resolve technical challenges
• Execute comprehensive test plans for data recovery...
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