3D NAND Design Rule & Process Integration Engineer

Micron Technology in Singapore is seeking an experienced E5/MTS/SMTS NAND Design Rule/Process Integration engineer to support the development and high-volume manufacturing of advanced 3D NAND technologies. You will lead the release of design rules and PDK deliverables while collaborating with cross-functional teams to ensure quality and timely execution across R&D and production.

The ideal candidate has a PhD in Electrical Engineering and extensive experience in PDK and semiconductor processes, with proficiency in CAD tools like Cadence Virtuoso. A strong understanding of 3D NAND process flow is essential for success.